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FPGA / HDL / VLSI / Architecture

Curated resources for FPGA / HDL / VLSI / Architecture.

14 resource(s) available

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courseFoundationNand2Tetris

Nand2Tetris

Nand2Tetris

One of the best bottom-up systems courses ever made.

resourceFoundationHDLBits

HDLBits

HDLBits

Fastest hands-on path to becoming comfortable with HDL syntax and design patterns.

resourceBuildProject F

Project F

Project F

Clear practical tutorials for FPGA graphics, timing, and hardware thinking.

docsBuildYosysHQ

Yosys

YosysHQ

The core open synthesis tool for serious FPGA and ASIC experimentation.

docsAdvancedOpenLane

OpenLane

OpenLane

Best structured on-ramp into reproducible open-source ASIC flows.

docsAdvancedOpenLane

OpenLane 2 Docs

OpenLane

Flow docs for reproducible open ASIC implementation with configurable steps and tooling.

docsAdvancedOpenROAD Project

OpenROAD

OpenROAD Project

Critical open path into physical design and full RTL-to-GDS workflows.

docsContributorlowRISC / Chisel

OpenTitan + Chisel bundle

lowRISC / Chisel

Great long-term contributor target once you are comfortable with verification and hardware architecture.

docsContributorlowRISC

OpenTitan Docs

lowRISC

Open-source silicon root of trust project with hardware, software, and documentation for secure silicon contribution.