OpenTitan Docs

Category

FPGA / HDL / VLSI / Architecture

Provider

lowRISC

Type

docs

Level

Contributor

Topic

FPGA / HDL / VLSI / Architecture

Track

FPGA / HDL / VLSI / Architecture

Section

Learning path

Format

Documentation / repository

Status

publishable

Commercial

link-only

Featured

no

Fast start

no

Sequence

nan

Priority

A

Primary source

mega_open_hub

Sources

mega_open_hub

ID

ccc09f9804022cb0

cocotb Docs

cocotb

Python-based testbench framework docs for HDL verification.

OpenLane 2 Docs

OpenLane

Flow docs for reproducible open ASIC implementation with configurable steps and tooling.

OpenTitan + Chisel bundle

lowRISC / Chisel

Great long-term contributor target once you are comfortable with verification and hardware architecture.

Yosys

YosysHQ

The core open synthesis tool for serious FPGA and ASIC experimentation.

Verilator + cocotb bundle

Verilator / cocotb

Gives you modern simulation and Python-based verification habits.

OpenROAD

OpenROAD Project

Critical open path into physical design and full RTL-to-GDS workflows.

OpenLane

OpenLane

Best structured on-ramp into reproducible open-source ASIC flows.

Project F

Project F

Clear practical tutorials for FPGA graphics, timing, and hardware thinking.

Nand2Tetris

Nand2Tetris

One of the best bottom-up systems courses ever made.

MIT 6.004 / Computation Structures

MIT

Bridges digital logic, computer architecture, performance, and systems reasoning.

HDLBits

HDLBits

Fastest hands-on path to becoming comfortable with HDL syntax and design patterns.

Ollama Docs

Ollama

Official documentation for running and integrating local models with a simple developer workflow.